雑誌論文
  1. Y. Noguchi, T. Hamada, F. Matsumoto, S. Sugimoto, A. Yoshida, H. Kobayashi, M. Kobayashi, “Confirmation of the Distribution of Measured Values from an Ultrasound Fetal Heart Rate Monitor,” Japanese Journal of Applied Physics, Vol.36, No.5B, pp.3226-3227 (1997.5)
  2. F. Matsumoto, “A Novel Linearized Transconductor Using a Differential Current Amplifier,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E80-A，No.5, pp.916-919 (1997.5)
  3. 松元 藤彦, “積分器の位相補償手法と差動信号入力積分器を用いた高周波連立チェビシェフ低域フィルタの構成,” 電気学会論文誌C, 117巻, 8号, pp.1021-1027 (1997.8)
  4. F. Matsumoto, Y. Noguchi, “A Realization of a Low-Voltage Differential-Output OTA Using a Simple CM Amplifier,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E81-A, No.2, pp.261-264 (1998.2)
  5. Y. Noguchi, K. Watanabe, E. Kashiwagi, T. Hamada, K. Mariko, F. Matsumoto, “Ultrasound Doppler Sinusoidal Shift Signal Analysis by Time-Frequency Distribution with New Kernel,” Japanese Journal of Applied Physics, Vol.37, No.5B, pp.3064-3067 (1998.5)
  6. F. Matsumoto, Y. Noguchi, “A Novel Phase Compensation Technique for Integrated Feedback Integrators,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E81-A，No.6, pp.1168-1171 (1998.6)
  7. 野口 泰明, 鞠古 賢, 大谷 実, 松元 藤彦, “CMOS-IC 負荷による遠端クロストーク,” 電気学会論文誌A, 118巻, 7/8 号, pp.773-779 (1998.7)
  8. Y. Noguchi, T. Hamada, F. Matsumoto, S. Sugimoto, “Heart Rate Simulation with IPFM Model Considering Absolute Refractory Period and Demodulation of Original Generating Function,” IEICE Transactions Information and Systems, Vol.E81-D, No.8, pp.933-939 (1998.8)
  9. Y. Noguchi, M. Ohtani, K. Mariko, F. Matsumoto, “Crosstalk of Microstrip Lines with Capacitor Loads,” International Journal of Electronics, Vol.85, No.3, pp.327-336 (1998.9)
  10. K. Maeda, M. Utsu, A. Makio, M. Serizawa, Y. Noguchi, T. Hamada, K. Mariko, F. Matsumoto, “Neural Network Computer Analysis of Fetal Heart Rate,” Journal of Maternal-Fetal Investigation, Vol.8, No.4, pp.163-171 (1998.12)
  11. F. Matsumoto, Y. Noguchi, “A 1-V Continuous-Time Filter Using Bipolar Pseudo-Differential Transconductors,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E82-A，No.6, pp.973-980 (1999.6)
  12. F. Matsumoto, Y. Noguchi, “A Feedforward Excess-Phase Cancellation Technique for Integrators,” International Journal of Electronics, Vol.87, No.1, pp.11-25 (2000.1)
  13. F. Matsumoto, A. Miyake, Y. Noguchi, “A High-Precision Low-Voltage Bipolar Current Mirror Circuit and Its Compensation for Stability,” International Journal of Electronics, Vol.87, No.1, pp.71-78 (2000.1)
  14. F. Matsumoto, Y. Noguchi, “Novel Low-Voltage Linear OTAs Employing Hyperbolic Function Circuits,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E83-A，No.6, pp.956-964 (2000.6)
  15. F. Matsumoto, Y. Noguchi, “Realization of a Triple-Tail Cell with High Input Resistance for Low-Voltage Application,” International Journal of Electronics, Vol.87, No.9, pp.1037-1045 (2000.9)
  16. 松元 藤彦, 野口 泰明, “トリプルテールセルと能動分圧器で構成される低電圧線形OTA,” 電気学会論文誌C，120巻, 10号, pp.1312-1318 (2000.10)
  17. Y. Noguchi, E. Kashiwagi, K. Watanabe, F. Matsumoto, S. Sugimoto, “Time-Frequency Analysis of the Blood Flow Doppler Ultrasound Signal,” Japanese Journal of Applied Physics, Vol.40, No.5B, pp.3882-3887 (2001.5)
  18. F. Matsumoto, I. Yamaguchi, H. Wasaki, Y. Noguchi, “Low-Voltage Linear OTAs Employing Multi-TANH Doublet and Exponential-Law Circuits,” The Transactions of The Institute of Electrical Engineers of Japan, Vol.122-C, No.3, pp.425-432 (2002.3)
  19. F. Matsumoto, H. Wasaki, Y. Noguchi, “Current Feedforward Phase Compensation Technique for an Integrator and Its Application to an Auto-Compensation System,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E85-A，No.6, pp.1192-1199 (2002.6)
  20. F. Matsumoto, H. Wasaki, Y. Noguchi, “Low-Voltage Linear Bipolar OTAs Employing Hyperbolic Circuits with an Intermediate Voltage Terminal,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E85-A，No.6, pp.1200-1208 (2002.6)
  21. Y. Noguchi, N. Miyao, F. Matsumoto, “Far-End Crosstalk Voltage for a CMOS-IC Inverter Load,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E86-A，No.6, pp.1451-1457 (2003.6)
  22. K. Maeda, Y. Noguchi, F. Matsumoto, “Evaluation of Prolonged Fetal Monitoring with Normal and Pathologic Outcome Probabilities Determined by Artificial Neural Network,” Fetal Diagnosis and Therapy, Vol.18, No.5, pp.370-375 (2003.9)
  23. F. Matsumoto, S. Nakamura, H. Wasaki, Y. Noguchi, “Linear Bipolar OTAs Employing Exponential-Law Circuits,” International Journal of Circuit Theory and Applications, No.32, Issue 4, pp.255-274 (2004.7)
  24. F. Matsumoto, Y. Noguchi, “Linear Bipolar OTAs Based on a Triple-Tail Cell Employing Exponential Circuits,” IEEE Transactions on Circuits and Systems II, Vol.51, No.12, pp.670-674 (2004.12)
  25. I. Yamaguchi, F. Matsumoto, Y. Noguchi, “A Technique to Improve Linearity of Transconductor with Bias Offset Voltages Controlling a Tail Current,” Electronics Letters, Vol.41, No.21, pp.1146-1148 (2005.10)
  26. I. Yamaguchi, F. Matsumoto, Y. Noguchi, “A New Linear Transconductor Combining a Source Coupled Pair with a Transconductor Using Bias-Offset Technique,” IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Vol.E89-A，No.2, pp.369-376 (2006.2)
  27. F. Matsumoto, I. Yamaguchi, A. Yachidate, Y. Noguchi, “A Technique to Reduce Power Consumption for a Linear Transconductor,” IEICE Transactions on Electronics, Vol.E89-C，No.6, pp.814-818 (2006.6)
  28. 渡辺 武実, センクラシン アピラック, 松元 藤彦, 野口 泰明, “伝送線路に接続された可変容量ダイオード負荷の動的C-V特性,” 電気学会論文誌C, 127巻, 8号, pp.1199-1205 (2007.8)
  29. F. Matsumoto, A. Yachidate, Y. Noguchi, “A Technique to Compensate an Influence of Mobility Degradation by Combining a Source Coupled Pair with a Transconductor,” International Journal of Electronics, Vol.95, No.6, pp.549-559 (2008.6)
  30. F. Matsumoto, Y. Noguchi, “High-Efficiency Bipolar Transconductors Composed of Hyperbolic Function Circuits with an Intermediate Voltage Terminal and a Triple-Tail Cell,” International Journal of Electronics, Vol.95, No.6, pp.561-575 (2008.6)
  31. F. Matsumoto, I. Yamaguchi, Y. Noguchi, “A Technique to Improve Linearity of a Bias-Offset Transconductor Optimizing Aspect Ratio of Transistors,” Far East Journal of Electronics and Communications, Vol.2, Issue 2, pp.171-186 (2008.8)
  32. T. Watanabe, F. Matsumoto, Y. Noguchi, “Crosstalk Simulation for Parallel Microstrip Lines with a Nonlinear Capacitive Load Using Recurrence Formula and V-Q Characteristic,” Far East Journal of Electronics and Communications, Vol.2, Issue 3, pp.247-266 (2008.12)
  33. 渡辺 武実, センクラシン アピラック, 松元 藤彦, 野口 泰明, “容量性非線形負荷のV-Q特性を用いた反射波とクロストークの再現手法,” 電気学会論文誌C, 129巻, 1号, pp.189-190 (2009.1)
  34. Y. Noguchi, F. Matsumoto, K. Maeda, T. Nagasawa, “Neural Network Analysis and Evaluation of the Fetal Heart Rate,” Algorithms, Vol. 2, pp.19-30 (2009.1)
  35. 松元 藤彦, 宮澤 壽志大, 中村 晋太朗, 野口 泰明, “バイアスオフセット型CMOS線形トランスコンダクタの高性能化,” 電気学会論文誌C, 129巻, 8号, pp.1518-1526 (2009.8)
  36. T. Watanabe, F. Matsumoto, T. Miyazawa, Y. Noguchi, “Crosstalk Simulation for Parallel Microstrip Lines with a Nonlinear Capacitive Load Using the Dynamic C-V Characteristic,” Transactions on Electrical and Electronic Engineering, Vol.4, No.6, pp.742-749 (2009.11)
  37. F. Matsumoto, I. Yamaguchi, Y. Noguchi, “A New Technique to Improve Linearity of a Transconductor with Local Feedback,” Far East Journal of Electronics and Communications, Vol.4, Issue 1, pp.77-89 (2010.3)
  38. P.Tongpoon, F.Matsumoto, T. Ohbuchi, H.Takeuchi, “A Differential Input/Output Linear MOS Transconductor,” IEICE TRANSACTIONS on Electronics Vol. E94-C, No. 6, pp.1032-1041 (2011.06)
  39. P.Tongpoon, F.Matsumoto, H.Takeuchi, T. Ohbuchi, R.Ishio, “A novel design of local-feedback MOS transconductor using techniques for cancellation of mobility degradation and linearization of differential output current characteristic,” Analog Integrated Circuits and Signal Processing, Vol. 72, No. 3, pp. 565-574 (2012.08)
  40. T. Ohbuchi, F. Matsumoto, “A New Design of a Linear Local-Feedback MOS Transconductor for Low Frequency Applications,” Analog Integrated Circuits and Signal Processing, Vol. 75, No. 2, pp. 257-266 (2013.4)
  41. F. Matsumoto, S. Nishioka, T. Ohbuchi, T. Fujii, “Design of a symmetry-type floating impedance scaling circuits for a fully differential filter,” Analog Integrated Circuits and Signal Processing, Vol. 85, No. 2, pp. 253-261 (2015.11)
  42. T. Ohbuchi, F.Matsumoto, “A low-power and low-Gm linear transconductor utilizing control of a threshold voltage,” Analog Integrated Circuits and Signal Processing, Vol. 85, No. 2, pp. 263-273 (2015.11)
  43. F. Matsumoto, S. Nishioka, S. Matsuo, T. Ohbuchi, “A Symmetrical Floating Impedance Scaling Circuit with Improved Low-frequency Characteristics,” IEIE Transactions on Smart Processing and Computing, Vol. 6 No. 6, pp. 437-445 (2017.12)

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